COMPANY:
US R&D subsidiary of a Japanese fables
semiconductor design company for siliconized television tuners. Their parent
company is publicly traded manufacturer and one of their products includes TV
tuner card.
TITLE:
Mixed Signal IC Design Engineer
LOCATION:
Mountain View, CA
OBJECTIVE:
Cover designing project for TV tuners
from designing, simulating, lay outing to lab testing.
DUTIES:
Analyze specifications and
design RF circuits in RFCMOS/CMOS process based on specifications, draw
circuits with Cadence IC design tool.
Simulate how the circuit
works in a simulation environment on computer.
Draw a lay out to place
circuits into patterns to go on chips.
Test and debug sample
circuits in their laboratory, how the sample chips work within electronics
products under certain temperature, battery level and functions.
Take documentation of
specifications and keep designing notes.
Visit Japan for training and
internal meetings every a few months for a few weeks in length.
***Training will be provided in Japan
for a few weeks up to a few months depending on the person’s schedule.
***Junior level engineers will start
with support work for 1. simulation, 2. lay outing, 3. Cadence tool maintenance.
REQUIREMENTS:
Bachelor's degree in
Electrical Engineering or equivalent.
0 - 5 + years of analog or
mixed signal IC designing experience. (Entry level is ok.)
***Experienced candidates have to be
capable of designing independent blocks (functional parts of each chip)***
Experience and knowledge of
Cadence IC design tool is a plus.
Have experience in working on
the development of a commercialized IC product from the designing to lab
testing.
Familiarity/experience with
IBM's semiconductor process, especially 6RF, is a strong plus.
Japanese bilingual skills
(written and verbal ) is strongly desirable.
Ability to travel to Japan
for extended periods is desirable. (2 - 3 weeks per trip every few months.)
***VISA sponsorship is available.
Candidates interested in relocating to Japan (now or in the future) are
welcome.
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